Date of Completion

12-30-2014

Embargo Period

12-30-2014

Major Advisor

Dr. Mehdi Anwar

Associate Advisor

Dr. Geoff Taylor

Associate Advisor

Dr. John Chandy

Associate Advisor

Dr. Domenic Forte

Associate Advisor

Dr. Mark Tehranipoor

Field of Study

Electrical Engineering

Degree

Doctor of Philosophy

Open Access

Open Access

Abstract

The term “memristor” was coined by L. Chua from its two distinct functional characteristics, memory and resistor. From the symmetry argument of the circuit element and circuit variable matrix, memristor is deemed as the fourth fundamental circuit element, after resistor, capacitor, and inductor. Memristor switching and observed I-V characteristics are explained utilizing the underlying physics of the device in terms of the formation and rupture of filaments. Three different conduction mechanisms, namely - filament assisted tunneling current, bulk tunneling current and currents flowing through low and high conductivity filaments give rise to the total current in memristive systems. DC and RF performance of memristor circuits, including transient behavior, is developed by taking into account these current contributions arising from different conduction mechanisms. The DC circuit model explains the observed I-V hysteresis and most importantly allows scaling and optimization. RF analysis suggests for a maximum allowable frequency of 7.5 GHz beyond which TiO2 memristors can no longer be used as RRAMs. Transient performance of memristors employing different material systems is investigated and experimentally verified using ZnO nanowire memristors. ZrOx memristors showed the shortest switching delay owing to its high mobility of 370 cm2/V-s. Upon scaling devices down to 50 nm, the delay decreases by 3-4 orders of magnitude. Bipolar resistive switching with ROFF/RON ratio of 684 and rise and fall times shorter than 7µs and 10µs, respectively, is demonstrated for 2 µm ZnO nanowire memristors. Use of nanowire instead of thin films allows high packing density and as a result high bit density. Experimental demonstration of a 1-bit memristor PUF is reported for the first time implementing ZnO memristors showing 50% uncertainty and high reliability of the response bit for a given challenge. The physics based circuit model of memristors was also implemented to accurately determine the simulation time required for randomly selected polyominoes from a 3D array of memristors. The proposed model provides higher degree of complexity and results in 7 orders of increase in simulation time for an attacker than the previous best report. Operation of a material IMP logic has been demonstrated using only two ZnO memristors that is functional for 5µs logic pulses. Designing logics using memristors allows the use of the same physical unit as multiple functional units, such as – memory, logic, and interconnect. This approach has the potential to redefine the traditional computer architecture to advanced architectures overcoming the “von Neumann bottleneck” of throughput. Chaotic circuit was constructed using only 2 elements, a memristor and a series resistor, which is the most compact form of chaotic circuits ever reported, and demonstrated perfect chaos in its phase-space trajectory with the highest Lyapunov exponent being 61.57s-1.

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